4.2.2. Build & compile instructions
- 4.2.2.1. Running C and Python Applications
- 4.2.2.2. Compiling and running Streaming client applications
- 4.2.2.3. Build FPGA image
- 4.2.2.3.1. Prerequisites
- 4.2.2.3.2. Directory structure
- 4.2.2.3.3. FPGA sub-projects
- 4.2.2.3.4. Building process
- 4.2.2.3.5. Programming via JTAG
- 4.2.2.3.6. Simulation
- 4.2.2.3.7. Device tree
- 4.2.2.3.8. Signal mapping
- 4.2.2.3.9. Registers
- 4.2.2.3.9.1. FPGA Register map (Release 2.00-15)
- 4.2.2.3.9.2. FPGA Register map (Release 2.00-18)
- 4.2.2.3.9.3. FPGA Register map (Release 2.00-23)
- 4.2.2.3.9.4. FPGA Register map (Release 2.00-30)
- 4.2.2.3.9.5. FPGA Register map (Release 2.04-35)
- 4.2.2.3.9.6. FPGA Register map (Release 2.05-37)
- 4.2.2.3.9.7. FPGA Register map in dev
- 4.2.2.4. Build Red Pitaya ecosystem
- 4.2.2.5. Build Red Pitaya OS
- 4.2.2.6. Create your own WEB applications
- 4.2.2.6.1. System overview
- 4.2.2.6.2. Creating first app
- 4.2.2.6.3. Examples
- 4.2.2.6.3.1. Add a button to control LED
- 4.2.2.6.3.2. Reading analog voltage from slow inputs
- 4.2.2.6.3.3. Reading analog voltage from slow inputs + graph
- 4.2.2.6.3.4. Reading analog voltage from slow inputs + graph + gain and offset
- 4.2.2.6.3.5. Generating voltage
- 4.2.2.6.3.6. Nginx requests
- 4.2.2.6.3.7. Simple web example
- 4.2.2.6.4. Manually downloading and installing applications