3.1.1.10. SIGNALlab 250-12
3.1.1.10.1. Technical specifications
Basic |
|
---|---|
Processor |
DUAL CORE ARM CORTEX A9 |
FPGA |
FPGA Xilinx Zynq 7020 SOC |
RAM |
1 GB (8 Gb) |
System memory |
Micro SD up to 32 GB |
Console connection |
USB-C |
Power connector |
Power Jack RJ45 (PoE version only) |
Power consumption |
24 V, 0.5 A max |
Connectivity |
|
---|---|
Ethernet |
1 Gbit |
USB |
2 x USB 2.0 |
WIFI |
requires WIFI dongle |
RF inputs |
|
---|---|
RF input channels |
2 |
Sample rate |
250 MS/s |
ADC resolution |
12 bit |
Input impedance |
1 MOhm |
Full scale voltage range |
+-1 V/+-20 V (software selectable) |
Input coupling |
AC / DC (software selectable) |
Absolute max. Input voltage range |
30 V |
Input ESD protection |
Yes |
Overload protection |
Protection diodes |
Bandwidth |
DC - 60 MHz |
RF outputs |
|
---|---|
RF output channels |
2 |
Sample rate |
250 MS/s |
DAC resolution |
14 bit |
Load impedance |
50 Ohm |
Voltage range |
+-2 V / +-10 V (Hi-Z load) (software selectable) |
Short circut protection |
Yes |
Connector type |
BNC |
Output slew rate |
10 V / 17 ns |
Bandwidth |
DC - 60 MHz |
Extension connector |
|
---|---|
Digital IOs |
16 |
Analog inputs |
4 |
Analog inputs voltage range |
0-3.5 V |
Sample rate |
100 kS/s |
Resolution |
12 bit |
Analog outputs |
4 |
Analog outputs voltage range |
0-1.8 V |
Communication interfaces |
I2C, SPI, UART |
Available voltages |
+5 V, +3.3 V, -4 V |
external ADC clock |
yes |
Synchronisation |
|
---|---|
Trigger input |
Through BNC connector |
Daisy chain connection |
Over SATA connection (up to 500 Mbps) |
Ref. clock input |
Through SMA connector |
Note
For more information, please refer to the Product comparison table.
3.1.1.10.2. Schematics
Note
Red Pitaya board HW FULL schematics are not available. Red Pitaya has an open-source code but not open hardware schematics. Nonetheless, DEVELOPMENT schematics are available. This schematic has information on HW configuration, FPGA pin connection, and similar.