4.1.1.4. STEMlab 125-14-LN

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STEMlab 125-14 low noise is a STEMlab 125-14 board that is populated with additional linear analog power supplies to reduce RF output noise and consequently increase ENOB.

To find out more about the performance of the STEMlab 125-14 with DC analog power supplies, we suggest you refer to Leonhard Neuhaus’s blog.

4.1.1.4.1. Pinout

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4.1.1.4.2. Technical specifications

Basic

Processor

Dual core ARM Cortex-A9

FPGA

FPGA Xilinx Zynq 7010 SoC

RAM

512 MB (4 Gb)

System memory

Micro SD up to 32 GB

Console connector

Micro USB

Power connector

Micro USB

Power consumption

5 V, 2 A max


Connectivity

Ethernet

1 Gbit

USB

USB-A 2.0

Wi-Fi

requires Wi-Fi dongle


RF inputs

RF input channels

2

Sample rate

125 MS/s

ADC resolution

14 bit

Input impedance

1 MΩ / 10 pF

Full scale voltage range

±1 V (LV) and ±20 V (HV)

Input coupling

DC

Absolute max.
Input voltage
LV ±6 V
HV ±30 V

Input ESD protection

Yes

Overload protection

Protection diodes

Bandwidth

DC - 60 MHz

Connector type

SMA


RF outputs

RF output channels

2

Sample rate

125 MS/s

DAC resolution

14 bit

Load impedance

50 Ω

Voltage range

±1 V

Short circuit protection

Yes

Output slew rate

2 V / 10 ns

Bandwidth

DC - 50 MHz

Connector type

SMA


Extension connector

Digital IOs

16

Digital voltage levels

3.3 V

Analog inputs

4

Analog input voltage range

0 - 3.5 V

Analog input resolution

12 bit

Analog input sample rate

100 kS/s

Analog outputs

4

Analog output voltage range

0 - 1.8 V

Analog output resolution

8 bit

Analog output sample rate

≲ 3.2 MS/s

Analog output bandwidth

≈ 160 kHz

Communication interfaces

I2C, SPI, UART, CAN

Available voltages

+5 V, +3V3, -4 V

External ADC clock

Ext. clock models only

Synchronisation

External trigger input

E1 connector (DIO0_P)

External trigger input impedance

Hi-Z (digital input)

Trigger output 1

E1 connector (DIO0_N)

Daisy chain connection

SATA connectors
(up to 500 Mbps)

Ref. clock input

N/A

Footnotes

1

See the Click Shield synchronisation section and Click Shield synchronisation example.

Boot options

SD card

Yes

QSPI

Not populated

eMMC

N/A

Note

For more information, please refer to the Product comparison table.

4.1.1.4.3. Schematics

Note

FULL HW schematics for the Red Pitaya board are not available. Red Pitaya has open-source code but not open hardware schematics. Nonetheless, DEVELOPMENT schematics are available. This schematic will give you information about HW configuration, FPGA pin connections, and similar.

4.1.1.4.4. Mechanical Specifications and 3D Models

4.1.1.4.5. Other specifications

For all other specifications please refer to standard STEMlab 125-14 specs.