4.1.1.2. STEMlab 125-14

4.1.1.2.1. Pinout

Red Pitaya pinout

4.1.1.2.2. Technical specifications

Basic

Processor

DUAL CORE ARM CORTEX A9

FPGA

FPGA Xilinx Zynq 7010 SOC

RAM

512 MB (4 Gb)

System memory

Micro SD up to 32 GB

Console connection

Micro USB

Power connector

Micro USB

Power consumption

5 V, 2 A max


Connectivity

Ethernet

1 Gbit

USB

USB 2.0

Wi-Fi

requires Wi-Fi dongle


RF inputs

RF input channels

2

Sample rate

125 MS/s

ADC resolution

14 bit

Input impedance

1 MΩ / 10 pF

Full scale voltage range

±1 V (LV) and ±20 V (HV)

Input coupling

DC

Absolute max. Input voltage range

30 V

Input ESD protection

Yes

Overload protection

Protection diodes

Bandwidth

DC - 60 MHz


RF outputs

RF output channels

2

Sample rate

125 MS/s

DAC resolution

14 bit

Load impedance

50 Ω

Voltage range

±1 V

Short circuit protection

Yes

Connector type

SMA

Output slew rate

2 V / 10 ns

Bandwidth

DC - 50 MHz


Extension connector

Digital IOs

16

Analog inputs

4

Analog inputs voltage range

0-3.5 V

Sample rate

100 kS/s

Resolution

12 bit

Analog outputs

4

Analog outputs voltage range

0-1.8 V

Communication interfaces

I2C, SPI, UART, CAN

Available voltages

+5 V, +3.3 V, -4 V

External ADC clock

Yes


Synchronisation

Trigger input

Through extension connector

Daisy chain connection

Over SATA connection (up to 500 Mbps)

Ref. clock input

N/A

Note

For more information, please refer to the Product comparison table.

4.1.1.2.3. Schematics

Note

FULL HW schematics for the Red Pitaya board are not available. Red Pitaya has open-source code but not open hardware schematics. Nonetheless, DEVELOPMENT schematics are available. This schematic will give you information about HW configuration, FPGA pin connections, and similar.

4.1.1.2.4. Mechanical Specifications and 3D Models

4.1.1.2.5. Components

Note

STEMlab 125-14 Low Noise and STEMlab 125-14 4-Input feature Zynq 7020 instead of Zynq 7010.

4.1.1.2.8. External ADC clock

The ADC clock can be provided by:

  • On board 125 MHz XO (default)

  • From an external source/through extension connector E2 (R25, R26 should be moved to location R23, R24)

  • Directly from the FPGA (R25, R26 should be relocated to R27, R28)

Schematic

Schematic

Warning

We do not advise altering the board because users have reported problems after doing so. Every board made has undergone rigorous testing, which cannot be claimed for modified boards. Any non-Red Pitaya hardware modification will void the warranty, and we cannot guarantee support for modified boards.

Top side schematic

Top side schematic

Bottom side schematic

Bottom side schematic

Bottom side photo

Bottom side photo

Bottom side all

Bottom side

4.1.1.2.9. QSPI

The QSPI chip is by default not populated on Red Pitaya boards. Please write to support@redpitaya.com or info@redpitaya.com for information regarding board modifications.

Warning

Any non-Red Pitaya hardware modification will void the warranty, and we cannot guarantee support for modified boards.

4.1.1.2.10. Cooling options

For additional cooling, we recommend a 30 mm or 25 mm fan. You can use the board’s power connector to power the fan, but please note that it supplies only 5 V. The power connector is located between the micro-SD socket and the host USB connector.

../../../_images/cooling-powerPin.jpg

Red Pitaya power connector. Image via blog (with permission from Jacek Radzikowski).

Note

The power connector is a standard 2-pin 0.1” connector. Supplies only 5 V.