3.1.1.2.3. External ADC clock

ADC clock can be provided by:

  • On board 125MHz XO (default)

  • From external source / through extension connector E2 (R25,R26 should be moved to location R23,R24)

  • Directly from FPGA (R25,R26 should be moved to location R27,R28)

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Schematic

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Top side

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Bottom side

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