3.1.1.7. SDRlab 122-16

3.1.1.7.1. Technical specifications

3.1.1.7.2. Schematics

Note

Red Pitaya board HW FULL schematics are not available. Red Pitaya has an open source code but not an open hardware schematics. Nonetheless, DEVELOPMENT schematics are available. This schematic will give you information about HW configuration, FPGA pin connection and similar.

3.1.1.7.3. Mechanical specifications

3.1.1.7.4. External ADC clock

ADC clock can be provided by:

  • On board 122.88MHz XO (default)

  • From external source / through extension connector (instructions provided bellow)

  • Remove: R37, R46

  • Add: R34 = 0R, R35 = 0R

../../../_images/External_img1.png
  • Remove: FB11

../../../_images/External_img2.png
  • Remove: 0R on C64, R24

  • Add: C64 = 100nF, C63 = 100nF, R36 = 100R

../../../_images/External_img3.png
../../../_images/External_shem.png